Abstract We focuses on investigating the characteristics of the two- dimension parity check code for error detection as an algorithm on TCP/IP data transmission. [Read More]

Abstract We focuses on the characteristics of TCP/IP buffered data transmission in segments and with arbitrary delays. We’ll be modifying delays and TCP data packet buffer, transmitting them at different length and time. [Read More]

Abstract We covers how TCP/IP put together data packets before they are sent across the Internet, and the format it use to breaks packets down into small bits. [Read More]

Abstract We would like to create a simple device that give directional information. By implementing inexpensive peripheral module on the energy efficient Zybo board, we can emulate handheld compass. [Read More]

Abstract Process of embedded development of a Vivado Zynq Processor System (PS) with addition IP blocks on the Zybo Board by adding the AXI Timer IP block as additional interrupt source and the concatenation IP block to configure and complete the Zynq PS configuration. [Read More]